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International Symposium on Future of Computer Technology 2018 (ISFCT2018)

Hironori Kasahara

Hironori Kasahara

Professor, Waseda University
Japan’s first IEEE Computer Society President (2018)
Parallel Compiler Multicore Researcher
IEEE Computer Society President 2018

OSCAR Compiler for Automatic Multigrain Parallelization, Memory Optimization and Power Reduction for Multicore Systems

To improve processing performance and reduce power consumption, multicore processors have been widely used in embedded systems like a smartphone, self-driving cars, and IoT to high-performance systems like cloud servers and supercomputers. However, to realize efficient parallel processing of a target application program, parallelization of the program and memory usage optimization require long time periods and large cost. This talk introduces OSCAR (Optimally SCheduled Advanced MultiprocessoR) compiler allows users to have efficiently parallelized and memory optimized parallel programs for various multicores available in the market automatically in a short time and low cost. This short talk includes technical demos by the OSCAR compiler that gives us scalable performance improvement and power reduction for:

  • scientific applications like earthquake simulation and 3D FFT,
  • medical applications like heavy particle cancer therapy and capsule inner cameras,
  • industry applications like automotive hard-realtime engine control and MATLAB/Simulink model based designed programs, and
  • soft-realtime multimedia programs like H.264 and Optical flow

on various homogeneous and heterogeneous multicores from Intel, IBM, Fujitsu, ARM, Infineon, and Renesas multicore processors.


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Biography

Hironori Kasahara is an IEEE Computer Society President 2018 and a professor in the Department of Computer Science and Engineering at Waseda University. He is an IEEE Fellow, an IPSJ Fellow, a Golden Core Member of the IEEE Computer Society, a professional member of the IEEE Eta Kappa Nu, a member of the Engineering Academy of Japan and the Science Council of Japan. He received a PhD in 1985 from Waseda University, Tokyo, joined its faculty in 1986, and has been a professor of computer science since 1997 and a director of the Advanced Multicore Research Institute since 2004. He was a visiting scholar at University of California, Berkeley, and the University of Illinois at Urbana–Champaign’s Center for Supercomputing R&D.

He has served as a chair or member of 250 society and government committees, including a member of the CS Board of Governors and Executive Committee; chair of CS Planning Committee, Constitution & Bylaws Committee, Multicore STC and CS Japan chapter; associate editor of IEEE Transactions on Computers; vice PC chair of the 1996 ENIAC 50th Anniversary International Conference on Supercomputing; general chair of LCPC; PC member of SC, PACT, and ASPLOS; board member of IEEE Tokyo section; and member of the Earth Simulator and K supercomputer committees. Kasahara received the CS Golden Core Member Award, IFAC World Congress Young Author Prize, Sakai Special Research Award, and the Japanese Minister’s Science and Technology Prize. He led Japanese national projects on parallelizing compilers and embedded multicores, and has presented 215 papers, 155 invited talks, and 42 international patents. His research has appeared in 557 newspaper and Web articles.